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OS/2 Warp Compatible Hardware List Web site: IDE Installation Guide

Daniela's Enhanced Drivers
Listing of IDE chipsets supported by the latest Dani1S506 device driver.

© Daniela Engert, os2warp.be (2000-2004)

How to use this reference?

The information included on this web page is rather technical. For the non-technical users, we will explain how to use the system briefly:

  1. First, you need to identify the IDE chipset (or controller) used in your computer. This can be done via pci.exe or scanpci.exe utilities. For example, running pci.exe (by the command pci.exe from an OS/2 Command Prompt) on a system with an Intel-based motherboard* will show this record for the IDE controller amongst the output it generates. Locating the specific record for the controller is a task for the visitor. os2warp.be Support Services will not assist in this.

    Vendor 8086h Intel Corporation
    Device 244Bh 82801BA UltraATA/100 IDE Controller (ICH2 B5 step)
    Command 0005h (I/O Access, BusMaster)
    Status 0280h (Supports Back-To-Back Trans., Medium Timing)
    Revision 05h, Header Type 00h, Bus Latency 00h
    Self test 00h (Self test not supported)
    PCI Class Storage, type IDE
    PCI EIDE Controller Features :
    BusMaster EIDE is supported
    Primary Channel is at I/O Port 01F0h and IRQ 14
    Secondary Channel is at I/O Port 0170h and IRQ 15
    Subsystem ID 24428086h 82801BA (ICH2) UltraDMA/100 IDE Controller (Guess Only!)
    Subsystem Vendor 8086h Intel Corporation
    Address 4 is an I/O Port : 0000F000h

    From the first line, you can see that the controller's Vendor ID is 0x8086 (8086h), and the second line states the Device ID: 0x244B (244Bh). These hexadecimal numbers can respectively be considered the surname and the first name of your controller.
    For more information about the pci.exe utility, os2warp.be Support Services hosts this article. The pci.exe utility can be downloaded via this web site via the Downloads Page.
    *: Note not all Intel motherboard have this chipset integrated on them.
  2. Now you have to see in the tables below if this device is supported. This can be done by browsing on these Vendor and Device IDs. In each table, the first cell in the first row displays the manufacturer name, followed by a column and the Vendor ID. All rows below have the device name and correct Device ID in the first column.
  3. Based on these IDs, a particular controller can be located on this page if it is officially supported by the Dani1S506 device driver. If the controller is not listed, this doesn't mean that it isn't supported, though. In that case, you'll just have to try it out, and if it works, you should report it so that we can either include official support for it and/or list it here.
  4. Sometimes there are several versions of a particular controller. In that case, the revision column will indicate the appropriate version (second column).
  5. The remaining columns display hardware information, like the different speeds and IDE technologies which are supported by the controller/chipset. A legend what the symbols mean is included at the bottom of this page.
AEC/Artop: 0x1191 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x0005 AEC 6210  
0x0006 AEC 6260  
0x0007 AEC 6260  
0x0009 AEC 6280/6880  
Comments
  • 6210 (possible 6260) - task file registers are inaccessible until busmaster engine is stopped.
  • possibly all - both channels share internal resources. Serialization is required.

Ali: 0x10B9 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x5229 M5229< 0x20  
< 0xC1 1533, 1543E/F  
< 0xC2 1543C  
< 0xC3/0x12 1543C-E  
< 0xC4 1535, 1553, 1543C-B, 1535D  
== 0xC4 1535D+  
> 0xC4 1535D+  
Comments
  • 1535 and better - busmaster engine 'active' status bit is nonfunctional in UltraDMA modes.
  • up to 1543C - can't do ATAPI DMA writes.
  • 1543C-E - UltraDMA CRC checker fails with older WDC disks.
  • 1543C-Bx - must stop busmaster reads with 0x00 instead of 0x08
  • >= 0xC5 - no host side cable type detection.

AMD: 0x1022 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x7401 AMD 751  
0x7409 AMD 756  
0x7411 AMD 766 MP  
0x7441 AMD 768 MPX  
0x7469 AMD 8111  
Comments
  • 756 - no host side cable type detection.
  • 756 - SingleWord DMA doesn't work on early chip revisions.
  • 766 - read/write prefetches must be disabled to defeat infinite PCI bus retries.

CMD/Silicon Image: 0x1095 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x0640 CMD 640  
0x0643 CMD 643< 03  
>= 03  
0x0646 CMD 646< 03  
>= 03  
0x0648 CMD 648  
0x0649 CMD 649  
0x0680 SiI 680  
0x3112 SiI 3112   SATASATASATA

Cyrix: 0x1078 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x0102 CX5530  
Comments
  • all - busmaster transfers need to be 16 byte aligned instead of word aligned.
  • all - a DMA block of 64KiB comes out as 0 bytes in the DMA engine.

HighPoint: 0x1103 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x0004 HPT 36x/37x<=01 HPT 366  
02 HPT 368  
03 HPT 370  
04 HPT 370A  
05 HPT 372  
0x0005 HPT 372A  
0x0006 HPT 302  
0x0007 HPT 371  
0x0008 HPT 36x/37x dual07  
0x0009 HPT 372N  
Comments
  • HPT366 - random failures with several disks.
  • HPT366 - random PCI bus lockups in case of too long bursts.
  • HPT366 - IBM DTLA series drives must be set to Ultra DMA mode 5 (!!) to work reliable at Ultra DMA mode 4 speed.

Intel: 0x8086 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x1230 PIIX  
< 02  
SbID: 0x84C4 Orion
SbRev: < 04
< 02  
0x7010 PIIX3  
0x7111 PIIX4  
0x7199 PIIX4 MX  
0x2411 ICH  
0x7601 ICH  
0x2421 ICH0  
0x244B ICH2  
0x244A ICH2 mobile  
0x245B C-ICH  
0x248B ICH3  
0x248A ICH3 mobile  
0x24CB ICH4  
0x24CA ICH4 mobile  
0x24DB ICH5 (PATA)  
0x24D1 ICH5 (SATA)   SATASATASATA
0x24DF ICH5R (SATA)   SATASATASATA
Comments
  • PIIX3 - Some chips 'forget' to assert the IRQ sometimes. These chips are not detectable in advance.
  • ICH2+ - Despite the docs, the ATA/100 capable chips also can do ATA/133
Notes:SbID = Southbridge or Host ID
SbRev = Southbridge or Host Revision

Nation Semiconductor: 0x100B Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x052 SCx200  

Nvidia: 0x10DE Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x01BC nForce  
0x0065 nForce2  
Comments
  • all - no host side cable detection.
  • all - read/write prefetches must be disabled to defeat infinite PCI bus retries.

Opti: 0x1045 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0xC621 n/a  
0xC558 Viper  
0xD568< 0xC700 Viper  
>= 0xC700 FireStar/Vendetta?  
0xD721 Vendetta  
0xD768 Vendetta  
Comments
  • C621 - both channels share internal resources. Serialization is required.
  • FireStar - Ultra DMA works reliably only at mode 0. Update: not even that! Better do MWDMA2 at most.

Promise: 0x105A Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x4D33 PDC20246 Ultra33  
0x4D38 PDC20262 Ultra66  
0x0D38 PDC20263 Ultra66  
0x0D30 PDC20265 Ultra100  
0x4D30 PDC20267 Ultra100  
0x4D68 PDC20268 Ultra100 TX2  
0x6268 PDC20270 Ultra100 TX2  
0x4D69 PDC20269 Ultra133 TX2  
0x6269 PDC20271 Ultra133 TX2  
0x1275 PDC20275 Ultra133 TX2  
0x5275 PDC20276 Ultra133 TX2  
0x7275 PDC20277 Ultra133 TX2  
Comments
  • up to Ultra100 - don't issue superfluous PIO transfer mode setups.
  • up to Ultra100 - if any device is initialized to UltraDMA, you need to reset the channel if you want to select MultiWord DMA instead.
  • Ultra66/100 - "a LBA48 DMA mode transfer needs an extra ""kick""."
  • Ultra66/100 - "ATAPI DMA should work according to Windows drivers, but the register model is very ""strange""."

ServerWorks: 0x1166 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x0211 OSB4  
0x0212 CSB5< 0x92  
>= 0x92  
0x0213 CSB6< 0xA0  
>= 0xA0  
Comments
  • OSB4 - at least early revisions lock up on ATAPI DMA aborts
  • OSB4 - at least some chip revisions can't do Ultra DMA mode 1 and above.
  • OSB4 - some chip revisions may get stuck in the DMA engine in Ultra DMA with some disks.
  • CSB5 - trickles up to 3 (instead of common 2) words on UDMA throttle in ATA/100 mode. This may cause FIFO overruns in the units. Seen on Seagate Barracuda IV.
  • CSB5 - no host side cable type detection (vendor specific).
  • CSB6 - no host side cable type detection (vendor specific).

Sis: 0x1039 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x5513 5513< 0xD0  
>= 0xD0  
SbID: >= 0x530
>= 0xD0  
SbID: == 0x0630
>= 0xD0  
SbID: == 0x0630
SbRev: >= 0x30
>= 0xD0  
SbID: > 0x0630
>= 0xD0  
SbID: 0x0961
SbRev: < 0x10
>= 0xD0  
SbID: 0x0961
SbRev: >= 0x10
>= 0xD0  
SbID: >= 0x0961
>= 0xD0  
0x5517 5517< 0x10  
>= 0x10  
0x5518 5518  
Comments
  • older Sis - don't touch the busmaster registers too early after interrupt
Notes:SbID = Southbridge or Host ID
SbRev = Southbridge or Host Revision

SMSC: 0x1055 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x9130 SLC90E66  

Via: 0x1106 Rev. ATA PIO 32bit ATA DMA LBA48 DMA ATAPI PIO 32bit ATAPI DMA ATA33 ATA66 ATA100 ATA133 Docs. avail.
0x1571 571  
0x0571 571
SbID: 0x0586
 
SbID: 0x0586
SbRev: >= 0x20 586A/B
 
SbID: 0x0596
SbRev: < 0x10 596/A
 
SbID: 0x0596
SbRev: >= 0x10 596B
 
SbID: 0x0686
SbRev: < 0x10 686
 
SbID: 0x0686
SbRev: < 0x40 686A
 
SbID: 0x0686
SbRev: >= 0x40
 
SbID: 0x8231
SbRev: VT8231
 
SbID: 0x3074
SbRev: VT8233
 
SbID: 0x3109
SbRev: VT8233c
 
SbID: 0x3147
SbRev: VT8233a
 
SbID: 0x3177
SbRev: VT8235
 
Comments
  • all - no host side cable type detection.
  • all - the busmaster 'active' bit doesn't match the actual busmaster state.
  • 596B - don't touch the busmaster registers too early after interrupt
  • 596B - don't touch the taskfile registers before stopping the busmaster!
  • 686 - rev 40/41 and VT8231 rev 10/11 have the PCI corruption bug!
Notes:SbID = Southbridge or Host ID
SbRev = Southbridge or Host Revision

Documentation status:

means "documentation not available"
means "documentation publicly available"
means "documentation available, but confidential"
or means "documentation partially available" or "other documentation applies here as well"

Other status:

or means "requires special attention described in comments"



Copyright Information


Last modified: 2004/08/30, 15:54 | This site is sponsored by Mensys B.V.